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1. general description the PCA9546A is a quad bi-directional translating switch controlled via the i 2 c-bus. the scl/sda upstream pair fans out to four downstream pairs, or channels. any individual scx/sdx channel or combination of channels can be selected, determined by the contents of the programmable control register. an active low reset input allows the PCA9546A to recover from a situation where one of the downstream i 2 c-buses is stuck in a low state. pulling the reset pin low resets the i 2 c-bus state machine and causes all the channels to be deselected as does the internal power-on reset (por) function. the pass gates of the switches are constructed such that the v dd pin can be used to limit the maximum high voltage which will be passed by the PCA9546A. this allows the use of different bus voltages on each pair, so that 1.8 v or 2.5 v or 3.3 v parts can communicate with 5 v parts without any additional protection. external pull-up resistors pull the bus up to the desired voltage level for each channel. all i/o pins are 5 v tolerant. 2. features n 1-of-4 bi-directional translating switches n i 2 c-bus interface logic; compatible with smbus standards n active low reset input n 3 address pins allowing up to 8 devices on the i 2 c-bus n channel selection via i 2 c-bus, in any combination n power-up with all switch channels deselected n low r on switches n allows voltage level translation between 1.8 v, 2.5 v, 3.3 v and 5 v buses n no glitch on power-up n supports hot insertion n low stand-by current n operating power supply voltage range of 2.3 v to 5.5 v n 5 v tolerant inputs n 0 khz to 400 khz clock frequency n esd protection exceeds 2000 v hbm per jesd22-a114, 200 v mm per jesd22-a115, and 1000 v cdm per jesd22-c101 n latch-up testing is done to jedec standard jesd78 which exceeds 100 ma n three packages offered: so16, tssop16, and hvqfn16 PCA9546A 4-channel i 2 c switch with reset rev. 03 6 april 2005 product data sheet
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 2 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 3. ordering information standard packing quantities and other packaging data are available at www.standardics.philips.com/packaging . 4. marking table 1: ordering information t amb = - 40 c to +85 c type number package name description version PCA9546Abs hvqfn16 plastic thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 4 4 0.85 mm sot629-1 PCA9546Ad so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 PCA9546Apw tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 table 2: marking codes type number topside mark PCA9546Abs 546a PCA9546Ad PCA9546Ad PCA9546Apw pa9546a
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 3 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 5. block diagram fig 1. block diagram of PCA9546A switch control logic PCA9546A power-on reset 002aab188 sc0 sc1 sc2 sc3 sd0 sd1 sd2 sd3 v ss v dd reset i 2 c-bus control input filter scl sda a0 a1 a2
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 4 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 6. pinning information 6.1 pinning fig 2. pin con?guration for so16 fig 3. pin con?guration for tssop16 fig 4. pin con?guration for hvqfn16 (transparent top view) PCA9546Ad a0 v dd a1 sda reset scl sd0 a2 sc0 sc3 sd1 sd3 sc1 sc2 v ss sd2 002aab185 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 PCA9546Apw a0 v dd a1 sda reset scl sd0 a2 sc0 sc3 sd1 sd3 sc1 sc2 v ss sd2 002aab186 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 002aab187 transparent top view sd1 sd3 sc0 sc3 sd0 a2 reset scl sc1 v ss sd2 sc2 a1 a0 v dd sda 4 9 3 10 2 11 1 12 5 6 7 8 16 15 14 13 terminal 1 index area PCA9546Abs
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 5 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 6.2 pin description [1] hvqfn package die supply ground is connected to both the v ss pin and the exposed center pad. the v ss pin must be connected to supply ground for proper device operation. for enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the pcb in the thermal pad region. 7. functional description refer to figure 1 bloc k diag r am of PCA9546A on page 3 . 7.1 device address following a start condition, the bus master must output the address of the slave it is accessing. the address of the PCA9546A is shown in figure 5 . to conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled high or low. the last bit of the slave address de?nes the operation to be performed. when set to logic 1 a read is selected, while a logic 0 selects a write operation. table 3: pin description symbol pin description so, tssop hvqfn a0 1 15 address input 0 a1 2 16 address input 1 reset 3 1 active low reset input sd0 4 2 serial data 0 sc0 5 3 serial clock 0 sd1 6 4 serial data 1 sc1 7 5 serial clock 1 v ss 86 [1] supply ground sd2 9 7 serial data 2 sc2 10 8 serial clock 2 sd3 11 9 serial data 3 sc3 12 10 serial clock 3 a2 13 11 address input 2 scl 14 12 serial clock line sda 15 13 serial data line v dd 16 14 supply voltage fig 5. slave address 002aab189 1 1 1 0 a2 a1 a0 r/w fixed hardware selectable
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 6 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 7.2 control register following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9546A, which will be stored in the control register. if multiple bytes are received by the PCA9546A, it will save the last byte received. this register can be written and read via the i 2 c-bus. 7.2.1 control register de?nition one or several scx/sdx downstream pair, or channel, is selected by the contents of the control register. this register is written after the PCA9546A has been addressed. the 4 lsbs of the control byte are used to determine which channel is to be selected. when a channel is selected, the channel will become active after a stop condition has been placed on the i 2 c-bus. this ensures that all scx/sdx lines will be in a high state when the channel is made active, so that no false conditions are generated at the time of connection. remark: several channels can be enabled at the same time. example: b3 = 0, b2 = 1, b1 = 1, b0 = 0, means that channel 0 and channel 3 are disabled and channel 1 and channel 2 are enabled. care should be taken not to exceed the maximum bus capacitance. fig 6. control register 002aab190 x x x x b3 b2 b1 b0 channel selection bits (read/write) 76543210 channel 0 channel 1 channel 2 channel 3 table 4: control register: writechannel selection; readchannel status d7 d6 d5 d4 b3 b2 b1 b0 command xxxxxxx 0 channel 0 disabled 1 channel 0 enabled xxxxxx 0 x channel 1 disabled 1 channel 1 enabled xxxxx 0 xx channel 2 disabled 1 channel 2 enabled xxxx 0 xxx channel 3 disabled 1 channel 3 enabled 00000000no channel selected; power-up/reset default state
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 7 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 7.3 reset input the reset input is an active low signal which may be used to recover from a bus fault condition. by asserting this signal low for a minimum of t wl , the PCA9546A will reset its registers and i 2 c-bus state machine and will deselect all channels. the reset input must be connected to v dd through a pull-up resistor. 7.4 power-on reset when power is applied to v dd , an internal power-on reset (por) holds the PCA9546A in a reset condition until v dd has reached v por . at this point, the reset condition is released and the PCA9546A registers and i 2 c-bus state machine are initialized to their default statesall zeroescausing all the channels to be deselected. thereafter, v dd must be lowered below 0.2 v to reset the device. 7.5 voltage translation the pass gate transistors of the PCA9546A are constructed such that the v dd voltage can be used to limit the maximum voltage that will be passed from one i 2 c-bus to another. figure 7 shows the voltage characteristics of the pass gate transistors (note that the graph was generated using the data speci?ed in section 11 static char acter istics of this data sheet). in order for the PCA9546A to act as a voltage translator, the v o(sw) voltage should be equal to, or lower than the lowest bus voltage. for example, if the main bus was running at 5 v, and the downstream buses were 3.3 v and 2.7 v, then v o(sw) should be equal to or below 2.7 v to effectively clamp the downstream bus voltages. looking at figure 7 , we see that v o(sw)(max) will be at 2.7 v when the PCA9546A supply voltage is 3.5 v or lower, so the PCA9546A supply voltage could be set to 3.3 v. pull-up resistors can then be used to bring the bus voltages to their appropriate levels (see figure 14 ). (1) maximum (2) typical (3) minimum fig 7. pass gate voltage versus supply voltage v dd (v) 2.0 5.5 4.5 3.0 4.0 002aaa964 3.0 2.0 4.0 5.0 v o(sw) (v) 1.0 3.5 5.0 2.5 (1) (2) (3)
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 8 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset more information can be found in application note an262: pca954x family of i2c/smbus multiplexers and switches . 8. characteristics of the i 2 c-bus the i 2 c-bus is for 2-way, 2-line communication between different ics or modules. the two lines are a serial data line (sda) and a serial clock line (scl). both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. data transfer may be initiated only when the bus is not busy. 8.1 bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see figure 8 ). 8.2 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low transition of the data line while the clock is high is de?ned as the start condition (s). a low-to-high transition of the data line while the clock is high is de?ned as the stop condition (p) (see figure 9 ). 8.3 system con?guration a device generating a message is a transmitter, a device receiving is the receiver. the device that controls the message is the master and the devices which are controlled by the master are the slaves (see figure 10 ). fig 8. bit transfer mba607 data line stable; data valid change of data allowed sda scl fig 9. de?nition of start and stop conditions mba608 sda scl p stop condition sda scl s start condition
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 9 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 8.4 acknowledge the number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. each byte of eight bits is followed by one acknowledge bit. the acknowledge bit is a high level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed must generate an acknowledge after the reception of each byte. also, a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. the device that acknowledges has to pull down the sda line during the acknowledge clock pulse so that the sda line is stable low during the high period of the acknowledge related clock pulse; setup and hold times must be taken into account. a master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this event, the transmitter must leave the data line high to enable the master to generate a stop condition. fig 10. system con?guration 002aaa966 master transmitter/ receiver slave receiver slave transmitter/ receiver master transmitter master transmitter/ receiver sda scl i 2 c multiplexer slave fig 11. acknowledgement on the i 2 c-bus 002aaa987 s start condition 9 8 2 1 clock pulse for acknowledgement not acknowledge acknowledge data output by transmitter data output by receiver scl from master
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 10 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 8.5 bus transactions data is transmitted to the PCA9546A control register using the write mode as shown in figure 12 . data is read from PCA9546A using the read mode as shown in figure 13 . fig 12. write control register fig 13. read control register 002aab196 xxxxb3b2b1b0 1 1 0 a2 a1 a0 0 a s 1 a p slave address start condition r/w acknowledge from slave acknowledge from slave control register sda stop condition 002aab197 xxxxb3b2b1b0 1 1 0 a2 a1 a0 1 a s 1 na p slave address start condition r/w acknowledge from slave no acknowledge from master control register sda stop condition last byte
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 11 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 9. application design-in information fig 14. typical application PCA9546A sd0 sc0 a1 a0 v ss sda scl reset v dd = 3.3 v v dd = 2.7 v to 5.5 v i 2 c/smbus master 002aab198 sda scl channel 0 v = 2.7 v to 5.5 v sd1 sc1 channel 1 v = 2.7 v to 5.5 v sd2 sc2 channel 2 v = 2.7 v to 5.5 v sd3 sc3 channel 3 v = 2.7 v to 5.5 v a2
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 12 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 10. limiting values [1] the performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. the maximum junction temperature of this integrated circuit should not exceed 150 c. table 5: limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to v ss (ground = 0 v). [1] symbol parameter conditions min max unit v dd supply voltage - 0.5 +7.0 v v i input voltage - 0.5 +7.0 v i i input current - 20 ma i o output current - 25 ma i dd supply current - 100 ma i ss ground supply current - 100 ma p tot total power dissipation - 400 mw t stg storage temperature - 60 +150 c t amb operating ambient temperature - 40 +85 c
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 13 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 11. static characteristics [1] for operation between published voltage ranges, refer to the worst-case parameter in both ranges. [2] v dd must be lowered to 0.2 v in order to reset part. table 6: dc characteristics v dd = 2.3 v to 3.6 v; v ss = 0 v; t amb = - 40 c to +85 c; unless otherwise speci?ed. see t ab le 7 on page 14 for v dd = 4.5 v to 5.5 v. [1] symbol parameter conditions min typ max unit supply v dd supply voltage 2.3 - 3.6 v i dd supply current operating mode; v dd = 3.6 v; no load; v i =v dd or v ss ; f scl = 100 khz -1650 m a i stb standby current standby mode; v dd = 3.6 v; no load; v i =v dd or v ss - 0.1 1 m a v por power-on reset voltage no load; v i =v dd or v ss [2] - 1.6 2.1 v input scl; input/output sda v il low-level input voltage - 0.5 - 0.3v dd v v ih high-level input voltage 0.7v dd -6 v i ol low-level output current v ol = 0.4 v 3 - - ma v ol = 0.6 v 6 - - ma i l leakage current v i =v dd or v ss - 1-+1 m a c i input capacitance v i =v ss -1213pf select inputs a0 to a2, reset v il low-level input voltage - 0.5 - 0.3v dd v v ih high-level input voltage 0.7v dd -v dd + 0.5 v i li input leakage current pin at v dd or v ss - 1-+1 m a c i input capacitance v i =v ss - 1.6 3 pf pass gate r on on-state resistance v dd = 3.67 v; v o = 0.4 v; i o = 15 ma 5 11 30 w v dd = 2.3 v to 2.7 v; v o = 0.4 v; i o =10ma 71655 w v o(sw) switch output voltage v i(sw) =v dd = 3.3 v; i o(sw) = - 100 m a - 1.9 - v v i(sw) =v dd = 3.0 v to 3.6 v; i o(sw) = - 100 m a 1.6 - 2.8 v v i(sw) =v dd = 2.5 v; i o(sw) = - 100 m a - 1.5 - v v i(sw) =v dd = 2.3 v to 2.7 v; i o(sw) = - 100 m a 1.1 - 2.0 v i l leakage current v i =v dd or v ss - 1-+1 m a c io input/output capacitance v i =v ss -35 pf
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 14 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset [1] for operation between published voltage ranges, refer to the worst-case parameter in both ranges. [2] v dd must be lowered to 0.2 v in order to reset part. table 7: dc characteristics v dd = 4.5 v to 5.5 v; v ss = 0 v; t amb = - 40 c to +85 c; unless otherwise speci?ed. see t ab le 6 on page 13 for v dd = 2.3 v to 3.6 v. [1] symbol parameter conditions min typ max unit supply v dd supply voltage 4.5 - 5.5 v i dd supply current operating mode; v dd = 5.5 v; no load; v i =v dd or v ss ; f scl = 100 khz - 65 100 m a i stb standby current standby mode; v dd = 5.5 v; no load; v i =v dd or v ss - 0.3 1 m a v por power-on reset voltage no load; v i =v dd or v ss [2] - 1.7 2.1 v input scl; input/output sda v il low-level input voltage - 0.5 - 0.3v dd v v ih high-level input voltage 0.7v dd -6 v i ol low-level output current v ol = 0.4 v 3 - - ma v ol = 0.6 v 6 - - ma i il low-level input current v i =v ss 1- 1 m a i ih high-level input current v i =v dd 1- 1 m a c i input capacitance v i =v ss -1213pf select inputs a0 to a2, reset v il low-level input voltage - 0.5 - 0.3v dd v v ih high-level input voltage 0.7v dd -v dd + 0.5 v i li input leakage current pin at v dd or v ss - 1- +1 m a c i input capacitance v i =v ss -23 pf pass gate r on on-state resistance v dd = 4.5 v to 5.5 v; v o = 0.4 v; i o =15ma 4924 w v o(sw) switch output voltage v i(sw) =v dd = 5.0 v; i o(sw) = - 100 m a - 3.6 - v v i(sw) =v dd = 4.5 v to 5.5 v; i o(sw) = - 100 m a 2.6 - 4.5 v i l leakage current v i =v dd or v ss - 1- +1 m a c io input/output capacitance v i =v ss -35 pf
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 15 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 12. dynamic characteristics [1] pass gate propagation delay is calculated from the 20 w typical r on and the 15 pf load capacitance. [2] a device must internally provide a hold time of at least 300 ns for the sda signal (referred to the v ih(min) of the scl signal) in order to bridge the unde?ned region of the falling edge of scl. [3] c b = total capacitance of one bus line in pf. [4] measurements taken with 1 k w pull-up resistor and 50 pf load. table 8: dynamic characteristics symbol parameter conditions standard-mode i 2 c-bus fast-mode i 2 c-bus unit min max min max t pd propagation delay from sda to sdn, or scl to scn - 0.3 [1] - 0.3 [1] ns f scl scl clock frequency 0 100 0 400 khz t buf bus free time between a stop and start condition 4.7 - 1.3 - m s t hd;sta hold time (repeated) start condition. after this period, the ?rst clock pulse is generated. 4.0 - 0.6 - m s t low low period of the scl clock 4.7 - 1.3 - m s t high high period of the scl clock 4.0 - 0.6 - m s t su;sta setup time for a repeated start condition 4.7 - 0.6 - m s t su;sto setup time for stop condition 4.0 - 0.6 - m s t hd;dat data hold time 0 [2] 3.45 0 [2] 0.9 m s t su;dat data setup time 250 - 100 - ns t r rise time of both sda and scl signals - 1000 20 + 0.1c b [3] 300 ns t f fall time of both sda and scl signals - 300 20 + 0.1c b [3] 300 m s c b capacitive load for each bus line - 400 - 400 m s t sp pulse width of spikes which must be suppressed by the input ?lter - 50 - 50 ns t vd;dat data valid time high-to-low [4] -1- 1 m s low-to-high [4] - 0.6 - 0.6 m s t vd;ack data valid acknowledge - 1 - 1 m s reset t w(rst)l low-level reset time 4 - 4 - ns t rst reset time (sda clear) 500 - 500 - ns t rec;sta recovery time to start condition 0 - 0 - ns
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 16 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset fig 15. de?nition of timing on the i 2 c-bus t sp t buf t hd;sta p p s t low t r t hd;dat t f t high t su;dat t su;sta sr t hd;sta t su;sto sda scl 002aaa986 fig 16. de?nition of reset timing sda scl 002aab174 t rst 50 % 30 % 50 % 50 % 50 % t rec;sta t w(rst)l reset ledx led off start t rst ack or read cycle rise and fall times refer to v il and v ih . fig 17. i 2 c-bus timing diagram scl sda t hd;sta t su;dat t hd;dat t f t buf t su;sta t low t high t vd;ack 002aab175 t su;sto protocol start condition (s) bit 7 msb (a7) bit 6 (a6) bit 0 (r/w) acknowledge (a) stop condition (p) 1 /f scl t r t vd;dat
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 17 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 13. package outline fig 18. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 18 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset fig 19. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 19 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset fig 20. package outline sot629-1 (hvqfn16) terminal 1 index area 0.65 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 4.1 3.9 d h 2.25 1.95 y 1 4.1 3.9 2.25 1.95 e 1 1.95 e 2 1.95 0.38 0.23 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot629-1 mo-220 - - - - - - 0.75 0.50 l 0.1 v 0.05 w 0 2.5 5 mm scale sot629-1 hvqfn16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 58 16 13 12 9 4 1 x d e c b a e 2 01-08-08 02-10-22 terminal 1 index area 1/2 e 1/2 e a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 20 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset 14. soldering 14.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for ?ne pitch smds. in these situations re?ow soldering is recommended. 14.2 re?ow soldering re?ow soldering requires solder paste (a suspension of ?ne solder particles, ?ux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for re?owing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. typical re?ow peak temperatures range from 215 cto270 c depending on solder paste material. the top-surface temperature of the packages should preferably be kept: ? below 225 c (snpb process) or below 245 c (pb-free process) C for all bga, htsson..t and ssop..t packages C for packages with a thickness 3 2.5 mm C for packages with a thickness < 2.5 mm and a volume 3 350 mm 3 so called thick/large packages. ? below 240 c (snpb process) or below 260 c (pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm 3 so called small/thin packages. moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was speci?cally developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 21 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be ?xed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated ?ux will eliminate the need for removal of corrosive residues in most applications. 14.4 manual soldering fix the component by ?rst soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the ?at part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 c and 320 c. 14.5 package related soldering information [1] for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales of?ce. [2] all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . [3] these transparent plastic packages are extremely sensitive to re?ow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared re?ow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the re?ow oven. the package body peak temperature must be kept as low as possible. table 9: suitability of surface mount ic packages for wave and re?ow soldering methods package [1] soldering method wave re?ow [2] bga, htsson..t [3] , lbga, lfbga, sqfp, ssop..t [3] , tfbga, vfbga, xson not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hso, hsop, hsqfp, hsson, htqfp, htssop, hvqfn, hvson, sms not suitable [4] suitable plcc [5] , so, soj suitable suitable lqfp, qfp, tqfp not recommended [5] [6] suitable ssop, tssop, vso, vssop not recommended [7] suitable cwqccn..l [8] , pmfp [9] , wqccn..l [8] not suitable not suitable
9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 22 of 25 philips semiconductors PCA9546A 4-channel i 2 c switch with reset [4] these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. [5] if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. [6] wave soldering is suitable for lqfp, qfp and tqfp packages with a pitch (e) larger than 0.8 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [7] wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. [8] image sensor packages in principle should not be soldered. they are mounted in sockets or delivered pre-mounted on ?ex foil. however, the image sensor package can be mounted by the client on a ?ex foil by using a hot bar soldering process. the appropriate soldering pro?le can be provided on request. [9] hot bar soldering or manual soldering is suitable for pmfp packages. 15. abbreviations 16. revision history table 10: abbreviations acronym description cdm charged device model esd electro static discharge hbm human body model ic integrated circuit lsb least signi?cant bit mm machine model msb most signi?cant bit pcb printed-circuit board table 11: revision history document id release date data sheet status change notice doc. number supersedes PCA9546A_3 20050406 product data sheet - 9397 750 14318 PCA9546A_2 modi?cations: ? the format of this data sheet has been redesigned to comply with the new presentation and information standard of philips semiconductors. ? section 2 f eatures on page 1 : C 7th bullet: changed rds on to r on C 16th bullet: changed jesdec to jedec ? figure 4 pin con? gur ation f or hvqfn16 (tr ansparent top vie w) on page 4 : C added pin 1 indicator notch and center pad C changed pin 1 from a2 to reset ? section 6.2 pin descr iption on page 5 : added t ab le note 1 and its reference at hvqfn pin 6. ? section 7.2.1 control register de? nition on page 6 , third sentence: changed the 2 lsbs of the control byte ... to the 4 lsbs of the control byte ... ? section 7.5 v oltage tr anslation on page 7 : C figure 7 modi?ed and title changed from v pass voltage versus v dd to pass gate voltage versus supply voltage C 2nd paragraph: changed symbol v pass and v pass(max) to v o(sw) and v o(sw)(max) , respectively.
philips semiconductors PCA9546A 4-channel i 2 c switch with reset 9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 23 of 25 modi?cations (continued): ? added section 8.5 bus tr ansactions on page 10 ; moved figure 12 wr ite control register and figure 13 read control register to this section. ? t ab le 5 limiting v alues on page 12 : C in the description line below table title, changed referenced to gnd to referenced to v ss C removed (old) table note [1], as this statement is now covered in section 19 disclaimers ? t ab le 6 dc char acter istics on page 13 : C added (new) t ab le note 1 C changed symbol r on tor on and its parameter from switch resistance to on-state resistance C changed symbol v pass to v o(sw) C under conditions column: changed v swin to v i(sw) ; changed i swout to i o(sw) ? t ab le 7 dc char acter istics on page 14 : C added (new) t ab le note 1 C sub-section select inputs a0 to a2, reset: changed i li(max) from +50 m a to +1 m a. C sub-section pass gate: changed i l(min) from - 10 m a to - 1 m a; changed i l(max) from +100 m a to +1 m a C changed symbol r on tor on and its parameter from switch resistance to on-state resistance C changed symbol v pass to v o(sw) C under conditions column: changed v swin to v i(sw) ; changed i swout to i o(sw) ? t ab le 8 dynamic char acter istics on page 15 : C symbol t r changed to t r ; symbol t f changed to t f C changed symbols t vd;datl and t vd;dath to t vd;dat and added conditions indicating high-to-low and low-to-high transitions C changed symbol t wl(rst) to t w(rst)l C changed parameter for symbol t rec;sta from recovery to start to recovery time to start condition C in t ab le note 1 : changed r on to r on ? added figure 16 and figure 17 ? added section 15 ab bre viations PCA9546A_2 20040929 objective data sheet - 9397 750 13991 PCA9546A_1 PCA9546A_1 20040728 objective data sheet - 9397 750 13308 - table 11: revision history continued document id release date data sheet status change notice doc. number supersedes
philips semiconductors PCA9546A 4-channel i 2 c switch with reset 9397 750 14318 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 03 6 april 2005 24 of 25 17. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 19. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 20. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2005 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 6 april 2005 document number: 9397 750 14318 published in the netherlands philips semiconductors PCA9546A 4-channel i 2 c switch with reset 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 control register . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2.1 control register de?nition . . . . . . . . . . . . . . . . . 6 7.3 reset input . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.4 power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.5 voltage translation . . . . . . . . . . . . . . . . . . . . . . 7 8 characteristics of the i 2 c-bus. . . . . . . . . . . . . . 8 8.1 bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.2 start and stop conditions . . . . . . . . . . . . . . 8 8.3 system con?guration . . . . . . . . . . . . . . . . . . . . 8 8.4 acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . 9 8.5 bus transactions . . . . . . . . . . . . . . . . . . . . . . . 10 9 application design-in information . . . . . . . . . 11 10 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 12 11 static characteristics. . . . . . . . . . . . . . . . . . . . 13 12 dynamic characteristics . . . . . . . . . . . . . . . . . 15 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 14 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 14.1 introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 14.2 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . 20 14.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 20 14.4 manual soldering . . . . . . . . . . . . . . . . . . . . . . 21 14.5 package related soldering information . . . . . . 21 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 17 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 24 18 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 19 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 20 contact information . . . . . . . . . . . . . . . . . . . . 24

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